On Thu, Mar 23, 2000 at 03:01:55PM -0500, Todd Veldhuizen wrote:
> Oh boy! An essay question! :-)
And a jolly good essay it was too. Thanks.
[big snip]
> The load starts when the ld8.a instruction is reached. When the check
> instruction ld8.c.clr is reached, if the store clobbered the advanced
> load, then the load is done a second time. Otherwise it is a nop.
> The IA-64 has a special hardware table where it checks stores against
> advanced loads.
>
> So it might solve the problem we have now of software pipelining
> loops in the presence of aliasing. If there is aliasing, your code
> will "magically" run slower because of the check loads failing and
> re-issuing the loads. If there isn't aliasing, the check loads
> will be no-ops.
That's still not going to allow the compiler to re-order a loop
the way you suggested earlier, though. The dependancies might be
quite extensive. It (aliasing) still prevents you from
auto-parallelising/multi-threading such loops.
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